35 research outputs found

    GRL: A Specification Language for Globally Asynchronous Locally Synchronous Systems (Syntax and Formal Semantics)

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    A GALS (Globally Asynchronous, Locally Synchronous) system consists of a set of synchronous subsystems executing concurrently and interacting using an asynchronous communication scheme. Such systems involve a high degree of synchronous and asynchronous concurrency which makes challenging the design and debugging of applications. The use of formal methods in the design process helps designers to master that complexity and to build strong confidence in the correctness of these, usually safety-critical, systems. This report presents GRL (GALS Representation Language), a new formal language to specify GALS system for the purpose of formal verification, to provide design process with efficiency and correctness. GRL has a user-friendly syntax close to classical programming languages and an operational semantics combining the synchronous reactive paradigm inspired by classical data-flow languages and the asynchronous paradigm inspired by value-passing process algebras.Un système GALS (Globalement Asynchrone, Localement Synchrone) est composé d'un ensemble de sous-systèmes synchrones qui s'exécutent de manière concurrente suivant un schéma de communication asynchrone. De tels systèmes impliquent un haut degr'de concurrence synchrone et asynchrone, ce qui rend difficile la conception et le débogage des applications à cause du non-déterminisme des communications. L'intégration des méthodes formelles dans la procédure de conception aide les concepteurs à maîtriser cette complexité et à garantir la sûreté de ces systèmes, souvent critiques. Ce rapport présente GRL(GALS Representation Language), un nouveau langage formel pour la spécification des systèmes GALS afin de les vérifier formellement, pour rendre le processus de conception sûr et efficace. GRL possède une syntaxe conviviale, proche des langages de programmation classiques, et une sémantique opérationnelle qui combine le modèle synchrone inspiré de la programmation par flot de données et le modèle asynchrone inspiré des algèbres de processus

    GRL: A Specification Language for Globally Asynchronous Locally Synchronous Systems

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    International audienceA GALS (Globally Asynchronous, Locally Synchronous) system consists of several synchronous subsystems that evolve concurrently and interact with each other asynchronously. Most formalisms and design tools support either the synchronous paradigm or the asynchronous paradigm but rarely combine both, which requires an intricate modeling of GALS systems. In this paper, we present a new language, called GRL (GALS Representation Language) designed to model GALS systems in an abstract and versatile manner for the purpose of formal verification. GRL has formal semantics combining the synchronous reactive model underlying dataflow languages and the asynchronous concurrent model underlying process algebras. We present the basic concepts and the main constructs of the language, together with an illustrative example

    Formal Modeling and Verification of GALS Systems Using GRL and CADP

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    The GALS (Globally Asynchronous, Locally Synchronous) paradigm is a prevalent approach to design distributed synchronous subsystems that communicate with each other asynchronously. The design of GALS systems is tedious and error-prone due to the complexity of architectures and high synchronous and asynchronous concurrency involved. This paper proposes a model-based approach to formally verify such systems. Specifications are written in GRL (GALS Representation Language), dedicated to model GALS systems with homogeneous syntax and formal semantics. We present a translation from GRL to LNT, a value-passing process algebra with imperative flavour. The translation is automated by means of the GRL2LNT tool, making possible the analysis of GRL specifications using the CADP toolbox. We illustrate our approach with an access management system for smart parking based on distributed software systems embedded in programmable logic controllers

    Formal Modeling and Verification of GALS Systems Using GRL and CADP

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    The GALS (Globally Asynchronous, Locally Synchronous) paradigm is a prevalent approach to design distributed synchronous subsystems that communicate with each other asynchronously. The design of GALS systems is tedious and error-prone due to the complexity of architectures and high synchronous and asynchronous concurrency involved. This paper proposes a model-based approach to formally verify such systems. Specifications are written in GRL (GALS Representation Language), dedicated to model GALS systems with homogeneous syntax and formal semantics. We present a translation from GRL to LNT, a value-passing process algebra with imperative flavour. The translation is automated by means of the GRL2LNT tool, making possible the analysis of GRL specifications using the CADP toolbox. We illustrate our approach with an access management system for smart parking based on distributed software systems embedded in programmable logic controllers

    Ensuring consistency between cycle-accurate and instruction set simulators

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    International audienceThe xMAS micro-architecture modeling language has been introduced by Intel to facilitate the formal representation and analysis of on-chip interconnect fabrics. In this paper, we introduce xMAStime, a new domain-specific language inspired by xMAS. xMAStime allows the modeling of full micro-architectures comprising certain classes of CPU pipelines, caches, and RAM. Given an in-order pipeline model in xMAStime, we automatically generate both a Cycle-Accurate, Bit-Accurate (CABA) hardware simulator and a timed instruction set simulator where time is accounted with safe upper bounds, as in the pipeline analysis step of Worst-Case Execution Time (WCET) analysis. The approach relies on the theory of endochronous systems, which allows us to ensure functional equivalence and timing consistency between the two generated simulators, using a delay-insensitivity argument. xMAStime is implemented over Lucid Synchrone-a dataflow synchronous language featuring a higher order type system and type inference, which facilitate the definition of our DSL. We use the new DSL to model and synthesize simulation code for a full-fledged MIPS32-based architecture

    GRL: A Specification Language for Globally Asynchronous Locally Synchronous Systems (Syntax and Formal Semantics)

    Get PDF
    A GALS (Globally Asynchronous, Locally Synchronous) system consists of a set of synchronous subsystems executing concurrently and interacting using an asynchronous communication scheme. Such systems involve a high degree of synchronous and asynchronous concurrency which makes challenging the design and debugging of applications. The use of formal methods in the design process helps designers to master that complexity and to build strong confidence in the correctness of these, usually safety-critical, systems. This report presents GRL (GALS Representation Language), a new formal language to specify GALS system for the purpose of formal verification, to provide design process with efficiency and correctness. GRL has a user-friendly syntax close to classical programming languages and an operational semantics combining the synchronous reactive paradigm inspired by classical data-flow languages and the asynchronous paradigm inspired by value-passing process algebras.Un système GALS (Globalement Asynchrone, Localement Synchrone) est composé d'un ensemble de sous-systèmes synchrones qui s'exécutent de manière concurrente suivant un schéma de communication asynchrone. De tels systèmes impliquent un haut degr'de concurrence synchrone et asynchrone, ce qui rend difficile la conception et le débogage des applications à cause du non-déterminisme des communications. L'intégration des méthodes formelles dans la procédure de conception aide les concepteurs à maîtriser cette complexité et à garantir la sûreté de ces systèmes, souvent critiques. Ce rapport présente GRL(GALS Representation Language), un nouveau langage formel pour la spécification des systèmes GALS afin de les vérifier formellement, pour rendre le processus de conception sûr et efficace. GRL possède une syntaxe conviviale, proche des langages de programmation classiques, et une sémantique opérationnelle qui combine le modèle synchrone inspiré de la programmation par flot de données et le modèle asynchrone inspiré des algèbres de processus

    Multilevel simulation-based co-design of next generation HPC microprocessors

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    This paper demonstrates the combined use of three simulation tools in support of a co-design methodology for an HPC-focused System-on-a-Chip (SoC) design. The simulation tools make different trade-offs between simulation speed, accuracy and model abstraction level, and are shown to be complementary. We apply the MUSA trace-based simulator for the initial sizing of vector register length, system-level cache (SLC) size and memory bandwidth. It has proven to be very efficient at pruning the design space, as its models enable sufficient accuracy without having to resort to highly detailed simulations. Then we apply gem5, a cycle-accurate micro-architecture simulator, for a more refined analysis of the performance potential of our reference SoC architecture, with models able to capture detailed hardware behavior at the cost of simulation speed. Furthermore, we study the network-on-chip (NoC) topology and IP placements using both gem5 for representative small- to medium-scale configurations and SESAM/VPSim, a transaction-level emulator for larger scale systems with good simulation speed and sufficient architectural details. Overall, we consider several system design concerns, such as processor subsystem sizing and NoC settings. We apply the selected simulation tools, focusing on different levels of abstraction, to study several configurations with various design concerns and evaluate them to guide architectural design and optimization decisions. Performance analysis is carried out with a number of representative benchmarks. The obtained numerical results provide guidance and hints to designers regarding SIMD instruction width, SLC sizing, memory bandwidth as well as the best placement of memory controllers and NoC form factor. Thus, we provide critical insights for efficient design of future HPC microprocessors.This work has been performed in the context of the European Processor Initiative (EPI) project, which has received funding from the European Union’s Horizon 2020 research and innovation program under Grant Agreement № 826647. A special thanks to Amir Charif and Arief Wicaksana for their invaluable contributions to the SESAM/VPSim tool in the initial phases of the EPI project.Peer ReviewedPostprint (author's final draft

    Un environnement formel pour modéliser et vérifier les systèmes globalement asynchrones et localement synchrones

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    A GALS (Globally Asynchronous, Locally Synchronous) system consists of several synchronouscomponents that evolve concurrently, each with its own pace, and communicatealtogether asynchronously. This thesis proposes a formal modelling and verificationframework dedicated to GALS systems, with a focus on the asynchronous behaviour.As a cornerstone of our framework, we have designed a formal language, named GRL(GALS Representation Language). GRL enables the behavioural specification of synchronouscomponents, asynchronous communication, and constraints involving bothcomponent paces and the data carried by component inputs. To analyse GRL specifications,we took advantage of the CADP software toolbox for the verification of asynchronousconcurrent processes, using state space exploration techniques. For this purpose,we defined a translation from GRL to the LNT specification language supportedby CADP. The translation was implemented by a tool named GRL2LNT, thus enablingstate spaces to be automatically derived from GRL specifications.To enable the formal verification of GRL specifications, we designed a property specificationlanguage, named muGRL, which is interpreted on GRL state spaces. The muGRLlanguage is based on a set of patterns capturing properties of concurrent and GALSsystems, which reduces the complexity of using full-fledged temporal logics. The semanticsof muGRL are defined by a translation into the MCL temporal logic supported byCADP. Finally, we illustrated how GRL, muGRL, and CADP can be applied to modeland verify concrete GALS applications, including industrial case-studies.Un système GALS (Globalement Asynchrone, Localement Synchrone) est un ensemble de composants synchrones qui évoluent en même temps, chacun à propre rythme, et qui communiquent de manière asynchrone. Cette thèse propose un environnement formel de modélisation et de vérification dédié aux systèmes GALS, en se focalisant sur le comportement asynchrone.Notre environnement s’appuie sur un langage formel que nous avons conçu nommé GRL (GALS Représentation Language). GRL permet la spécification comportementale des composants synchrones, de la communication asynchrone, et des contraintes sur les rythmes des composants ainsi que sur les valeurs que prennent les entrées des composants. Pour analyser les spécifications GRL, nous utilisons CADP, une boîte à outils logicielle permettant la vérification de processus concurrents asynchrones par des techniques d'exploration d’espaces d’états. Dans ce but, nous avons défini une traduction de GRL vers LNT, un langage de spécification supporté par CADP. La traduction est implémentée dans un outil appelé GRL2LNT, permettant ainsi la génération automatique d’espaces d'états à partir de spécifications GRL.Pour permettre la vérification formelle des spécifications GRL, nous avons conçu un langage de propriétés nommé muGRL, qui est interprété sur les espaces d’états de GRL. Le langage muGRL est basé sur un ensemble de patrons qui capturent les propriétés des systèmes concurrents et des systèmes GALS, réduisant ainsi la complexité d'utiliser les logiques temporelles classiques. La sémantique de muGRL est définie par traduction vers MCL, le langage de logique temporelle fourni par CADP. Enfin, nous illustrons l’usage de GRL, muGRL et CADP pour la modélisation et la vérification d’applications GALS concrètes, comprenant des études de cas industrielles

    Formal Modelling and Verification of GALS Systems Using GRL and CADP

    Get PDF
    International audienceA GALS (Globally Asynchronous, Locally Synchronous) system consists of several synchronous components that evolve concurrently and interact with each other asynchronously. The design of GALS systems is tedious and error-prone due to the high degree of synchronous and asynchronous concurrency present in complex architectures. In this paper, we present GRL (GALS Representation Language), a formal language designed to model GALS systems, for the purpose of formal verification of the asynchronous aspects. GRL combines the synchronous reactive model underlying dataflow languages and the asynchronous concurrent model underlying process algebras. We propose a translation from GRL to LNT, a value-passing concurrent language with classical process algebra flavour. This makes possible the analysis of GRL specifications using all the state-of-the-art simulation and verification functionalities provided by the CADP toolbox
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